The 10.3-inch monochrome LCD display with a 7680×4320 resolution, MIPI interface, and no backlight is designed for high-precision grayscale applications. Ideal for e-readers, medical imaging, and industrial inspection, this ultra-high-resolution screen offers detailed visuals without backlighting, providing low power consumption and reduced eye strain in low-light settings.
DRAWING
SPECIFICATIONS
General Specification | |
---|---|
Part No. | DXQ10D3001 |
LCM Outline Dimension(mm) | 232.096(W) * 138.402(H)*1.24(T) |
Active Area(mm) | 228.096(W) * 128.304(H) |
Number of Pixel(pixels) | 7680*4320 |
Touch panel | without |
Operating temperature(°C) | -20 ~ 70℃ |
Storage temperature(°C) | -30 ~ +80℃ |
Backlight Type | without Backlight |
Brightness | 350nits |
Pixel arrangement | RGB stripe |
Pixel size | 29.7(W) * 29.7(H) mm |
Interface | MIPI-DSI 8 lanes |
Viewing Direction | ALL o'clock |
Module lifetime(Hours) | 50000 |
No. | Name | Remark |
---|---|---|
1 | GND | Ground |
2 | NC | No connectio n |
3 | NO | No connection |
4 | NC | No connection |
5 | NC | No connection |
6 | VSP | Positive input analog power(+5.5V) |
7 | NC | No connection |
8 | VSN | Negative input analog power(-5.5V) |
9 | NC | No connection |
10 | GND | Ground |
11 | GND | Ground |
12 | IOVCC | IO Power supply(1v8) |
13 | GND | Ground |
14 | NC | No connection |
15 | GND | Ground |
16 | NC | No connection |
17 | RESET | Reset signal input terminal(1v8) |
18 | TE | Tearing effect signal to frame memory writing |
19 | GND | Ground |
20 | GND | Ground |
21 | D0P_M | MASTER MIPI data Lane 0 positive-end input |
22 | D0N_M | MASTER MIPI data Lane 0 negative-end input |
23 | GND | Ground |
24 | D1P_M | MASTER MIPI data Lane 1 positive-end input |
25 | D1N_M | MASTER MIPI data Lane 1 negative-end input |
26 | GND | Ground |
27 | CLKP_M | MASTER MIPI Clock Lane positive-end input/output |
28 | CLKN_M | MASTER MIPI Clock Lane negative-end input/output |
29 | GND | Ground |
30 | D2P_M | MASTER MIPI data Lane 2 positive-end input |
31 | D2N_M | MASTER MIPI data Lane 2 negative-end input |
32 | GND | Ground |
33 | D3P_M | MASTER MIPI data Lane 3 positive-end input |
34 | D3N_M | MASTER MIPI data Lane 3 negative-end input |
35 | GND | Ground |
36 | D0P_S | Slave MIPI data Lane 0 positive-end input |
37 | D0N_S | Slave MIPI data Lane 0 negative-end input |
38 | GND | Ground |
39 | D1P_S | Slave MIPI data Lane 1 positive-end input |
40 | D1N_S | Slave MIPI data Lane 1 negative-end input |
41 | GND | Ground |
42 | CLKP_S | Slave MIPI Clock Lane positive-end input/output |
43 | CLKN_S | Slave MIPI Clock Lane negative-end input/output |
44 | GND | Ground |
45 | D2P_S | Slave MIPI data Lane 2 positive-end input |
46 | D2N_S | Slave MIPI data Lane 2 negative-end input |
47 | GND | Ground |
48 | D2P_S | Slave MIPI data Lane 2 positive-end input |
49 | D2N_S | Slave MIPI data Lane 2 negative-end input |
50 | GND | Ground |